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PIC16F946
DS41265A-page 168
Preliminary
2005 Microchip Technology Inc.
FIGURE 14-1:
SSP BLOCK DIAGRAM
(SPI MODE)
To enable the serial port, SSPEN bit (SSPCON<5>)
must be set. To reset or reconfigure SPI mode:
Clear bit SSPEN
Re-initialize the SSPCON register
Set SSPEN bit
This configures the SDI, SDO, SCK and SS pins as
serial port pins. For the pins to behave in a serial port
function, they must have their data direction bits (in the
TRISC register) appropriately programmed. This is:
SDI must have TRISC<7> set
SDO must have TRISC<4> cleared
SCK (Master mode) must have TRISC<6>
cleared
SCK (Slave mode) must have TRISC<6> set
SS must have TRISA<5> set.
.
Read
Write
Internal
Data Bus
RC7/RX/
RC4/T1G/
RA5/AN2/
RC6/TX/CK/
SSPSR reg
SSPBUF reg
SSPM<3:0>
bit 0
Shift
Clock
SS Control
Enable
Edge
Select
Clock Select
TMR2 Output
TCY
Prescaler
4, 16, 64
TRISC<6>
2
Edge
Select
2
4
SCL/
Peripheral OE
SDA/SEG8
DT/SDI/
SDO/SEG11
C2OUT/SS/
SEG5
SCK/
SEG9
Note 1: When the SPI is in Slave mode with SS
pin control enabled (SSPCON<3:0> =
0100
), the SPI module will reset if the SS
pin is set to VDD.
2: If the SPI is used in Slave mode with
CKE = 1, then the SS pin control must be
enabled.
3: When the SPI is in Slave mode with SS pin
control enabled (SSPCON<3:0> = 0100),
the state of the SS pin can affect the state
read back from the TRISC<4> bit. The
peripheral OE signal from the SSP module
into PORTC controls the state that is read
back
from
the
TRISC<4>
bit
(see
Section 19.4
“DC
Characteristics:
PIC16F946-I (Industrial), PIC16F946-E
(Extended)” for information on PORTC).
If read-modify-write instructions, such as
BSF,
are performed on the TRISC register
while the SS pin is high, this will cause the
TRISC<4> bit to be set, thus disabling the
SDO output.
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